
DFT Engineer
Ambarella · US Headquarters
Weak hiring record · median 84 days open
All reasons
- Open 73 days
- 68% of this employer's openings are over 60 days old
In its favour
- Still listed on the employer's own board
- Publishes a salary range
AI Vision Processors For Edge Applications
Our solutions make cameras smarter by extracting valuable data from high-resolution video streams.
Job Description
Ambarella, a worldwide leader in edge AI semiconductors and software, is on a mission to bring artificial intelligence to all types of everyday devices, for enhanced environmental perception in everything from security cameras to robots to autonomous vehicles.
Position Responsibilities
- DFT implementation (Scan, Compression, MBIST, LBIST, and Streaming Scan Network) from RTL to Post-Production for complex multi-million gate Computer Vision SoC.
- Analyze clocking scheme and implement clock control structure for at-speed scan testing
- Develop/Generate high-quality scan and mbist patterns.
- DFT Verification (including post place-and-route timing simulations).
- Work with Product Engineering team to bring up scan & mbist patterns on ATE.
- Support silicon production activities including failure diagnosis and test optimization.
Minimum Requirements
- MS in Electrical / Computer Engineering or BS in Electrical/Computer Engineering with 1-5 years of experience in DFT implementation
- Knowledge of DFT fundamentals
- Knowledge of Logic design and timing
- Knowledge of Verilog and Python
- Knowledge of Mentor Tessent tools is a plus
- Knowledge of scan diagnostics is a plus
The base salary range is $140,000 - $150,000. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The successful candidate will have the opportunity to convert to a full-time regular position. We also offer new-hire RSU grants and the opportunity for annual RSU grants, as well as other highly competitive benefits.
Skills
- Computer Vision
- Verilog
- Python
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