AI/HPC Fabric Connectivity Principal Engineer – Point-to-Point Mapping

AI/HPC Fabric Connectivity Principal Engineer – Point-to-Point Mapping

We are seeking a specialist Principal Engineer, Solutions Architecture to develop and maintain detailed point-to-point (P2P) connectivity designs for large-scale AI and HPC network fabrics.

You will translate approved network architectures, equipment configurations and data center layouts into accurate, installation-ready port maps and cabling schedules. Your work will define every connection from server NIC to switch port, including all intermediate patch panels, trunks, cassettes and cross-connects.

Working alongside network architects, infrastructure leads, cabling vendors and deployment teams, you will ensure that connectivity designs are technically correct, physically achievable and fully traceable through installation, validation and operational handover.

You will

• Turn approved AI/HPC network architectures (leaf-spine, Clos, rail-optimized) into installation ready port maps. That covers every connection from GPU/server NIC to switch port, across compute, storage, in-band and OOB fabrics.
• Design the physical cabling path end-to-end: patch cords, panels, cassettes, trunks, polarity, breakouts, cable lengths and optical loss budgets. You will work with the Sales teams to validate BOMs and ensure that any materials are the best fit.
• Produce and control the integration documents: cable schedules, rack elevations, labelling schedules and installation work packs. Use automated checks to catch duplicate ports, missing endpoints and incompatible components.
• Support the deployment teams and resolve installer queries. Working with cabling vendors on compatibility and lead times, and fix mispatches, polarity faults and failed links.
• Reconcile the topology and test results against the design, then deliver verified as-built records as part of any handover documentation.

Essential Requirements

• Proven experience producing detailed port maps or structured cabling designs for large DC, HPC or AI environments.
• Strong knowledge of leaf-spine/Clos and rail-optimized fabrics, plus InfiniBand and high-speed Ethernet at 200/400/800G.
• Hands-on fibre knowledge: SMF/MMF, LC and MPO/MTP, polarity, pinned/unpinned, APC/UPC, cassette mapping, DAC/AOC/optics, loss budgets and test methodologies.
• Able to apply TIA-942/568/606/569 and BICSI 002. Able to specify from Corning, Panduit or CommScope portfolios using vendor drawings and part numbers.
• Strong Excel and scripting (e.g. Python) for building and validating large connectivity datasets, plus Visio/AutoCAD and disciplined version control.

Desirable Requirements

• Experience with NVIDIA Quantum IB/Spectrum-X platforms and topology validation tools (e.g. UFM, LLDP) on multi-hall GPU cluster deployments.
• BICSI RCDD/DCDC, a fibre-optic qualification or manufacturer cabling certification. Awareness of ISO/IEC and EN standards.