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Staff Failure Analysis Engineer

Power Integrations · Penang, Malaysia

  • Hardware & Semiconductors
  • 501–1,000 employees
  • San Jose, California

Weak hiring record · median 166 days open

9292

Hiring signal

Actively hiring

Still listed on the employer's own board · How we score

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  • 67% of this employer's openings are over 60 days old

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  • Still listed on the employer's own board

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Staff Failure Analysis Engineer at Power Integrations. We’ll keep it in your applied jobs, so you can see it later and be warned before applying to the same employer twice.

Description

Job Description for Staff Silicon Level FA Engineer for PIM (Anton’s Replacement)

The Staff Silicon Level Failure Analysis Engineer will perform device level failure analysis to support RMA, customer issues, and internal engineering failure analysis requests.

Responsibilities

  • Performing fault isolation and defect analysis/characterization on power IC’s to identify root causes of product failures in power supply applications and/or in production test.
  • Provide comprehensive technical reports to customers on findings from product and power supply failure investigations.
  • Responsibility will also include effective verbal and written communication of results, which will be used to drive improvements in product design, process technology, and applications. Such communication will require, but not limited to, writing cogent and convincing technical reports suitable for internal/external customers.
  • Communicate with internal/external customers to address customer’s questions and concerns about failure analysis results.

Requirements

  • Minimum of 10 years of experience in failure analysis of power semiconductors, analog, and/or mixed signal IC devices.
  • Hands-on experience in failure analysis, electrical fault isolation, and defect characterization tools and techniques such as the following: ATE, curve trace, nano/micro-probing, OBIRCH/EMMI microscopy, liquid crystal, CSAM, XRAY, FIB, SEM/EDX and manual cross-sectioning and deprocessing techniques using both parallel-polishing and wet chemical etch techniques.
  • In-depth understanding of both digital and analog circuits, device physics and IC fabrication processes.
  • Ability to interpret IC ATE test data log is required. Ability to interpret system level (or PCB level) schematics, IC level schematics, and IC layout of CMOS and bipolar devices is required.
  • Excellent English speaking, reading and technical writing skill is required.
  • Candidates with direct experience in customer interface on resolution of customer quality problems will be given special consideration.
  • Candidates with background and experience in automotive failure analysis/customer communication will be given special consideration.

Preferences will be given to candidates who have a thorough understanding of Switch Mode Power Supply Design (SMPS) and different AC to DC power conversion topologies; hands-on experiences in performing testing and fault isolation techniques/skills at power supply system level (or PCB level).

Education

  • BS in Electronic Engineering or equivalent discipline is required. A candidate with MSEE will be given preference.

Skills

  • Crystal

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